Arm64 Registers
General Purpose Registers
X0 - X30 (General Purpose Registers)
Used for various purposes including function arguments, return values, and general data storage.
Example:
mov x0, 5 ; Move 5 into X0 add x1, x0, 3 ; Add 3 to X0 and store the result in X1
XZR (Zero Register)
Always reads as zero and writes are discarded.
Example:
mov x0, xzr ; Move 0 into X0
SP (Stack Pointer)
Points to the top of the stack.
Example:
stp x29, x30, [sp, #-16]! ; Push X29 and X30 onto the stack ldp x29, x30, [sp], #16 ; Pop X29 and X30 from the stack
FP (Frame Pointer)
Points to the base of the current stack frame.
Example:
mov x29, sp ; Set frame pointer to the current stack pointer
LR (Link Register)
Stores the return address for function calls.
Example:
bl function ; Branch with link to function, LR is set to return address ret ; Return from function, jump to address in LR
Special Purpose Registers
PC (Program Counter)
Points to the next instruction to be executed.
Example:
b label ; Branch to label, PC is updated to the address of label
NZCV (Condition Flags)
Holds the condition flags (Negative, Zero, Carry, Overflow).
Example:
adds x0, x1, x2 ; Add X1 and X2, update condition flags b.eq equal ; Branch to equal if the zero flag is set
SIMD and Floating-Point Registers
V0 - V31 (Vector Registers)
Used for SIMD (Single Instruction, Multiple Data) and floating-point operations.
Example:
fadd v0.2s, v1.2s, v2.2s ; Add two single-precision floating-point vectors
These registers are essential for various operations in ARM64 assembly programming, providing the necessary functionality for arithmetic, data manipulation, control flow, and memory access.